Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Effective wafer-to-wafer connection and heat dissipation are some of the challenges in three dimensional wafer integration. When two or more wafers are integrated together, spacing between the two wafers may be typically needed for heat dissipation, while still obtaining sufficient electrical connections between the two wafers. For example, direct bonding between copper contacts on two wafers may involve super-flat surfaces to achieve sufficient connection, which may not be easily achievable through conventional fabrication techniques or increase cost of fabrication.
The present disclosure identifies and evaluates current attempts to achieve thermal dissipation in three-dimensionally integrated wafers can be improved with alternative and/or additional solutions in order to effectively provide higher thermal dissipation without degrading electrical connectivity between the integrated wafers.